SK Hynix finalizes HBM4 memory design, preparing large-scale production for Nvidia’s next-gen Rubin processors

South Korean memory giant SK Hynix says it has completed development work on HBM4 and is now preparing the technology for mass production.

This puts it ahead of rivals Samsung and Micron, who are still developing their own versions.

The chips are expected to feature in Nvidia’s next-generation Rubin AI processors, and will play an important role in powering future artificial intelligence workloads.

Joohwan Cho, Head of HBM Development at SK Hynix, said: “Completion of HBM4 development will be a new milestone for the industry. By supplying the product that meets customer needs in performance, power efficiency and reliability in timely manner, the company will fulfill time to market and maintain competitive position.”

High Bandwidth Memory, or HBM, stacks layers of DRAM vertically to accelerate data transfer.

Demand for high bandwidth memory has risen with the surge in AI workloads, and energy efficiency has become a pressing concern for data center operators.

HBM4 doubles the number of I/O connections compared with the previous generation and improves power efficiency by more than 40%.

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The Korean memory maker says this translates into higher throughput and lower energy use in data centers, with service performance gains of up to 69%.

HBM4 surpasses the JEDEC industry standard operating speed of 8Gbps by running above 10Gbps.

SK Hynix adopted its advanced MR-MUF process for stacking chips, which improves heat dissipation and stability, along with the 1bnm process technology to help minimize manufacturing risk.

Justin Kim, President and Head of AI Infra at SK Hynix, said: “We are unveiling the establishment of the world’s first mass production system of HBM4. HBM4, a symbolic turning point beyond the AI infrastructure limitations, will be a core product for overcoming technological challenges. We will grow into a full-stack AI memory provider by supplying memory products with the best quality and diverse performance required for the AI era in a timely manner.”

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